The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device which is used in a mobile device or the like and in which even when an abrupt power source cut-off state such as battery coming-off is caused, the electric charges remaining in a pixel electrode can be reliably discharged, and thus a burn-in phenomenon and a flicker in a phase of redriving are each hardly caused.
Since a liquid crystal device has the features such as light weight, thinness and low power consumption as compared with the case of a Cathode Ray Tube (CRT), the liquid crystal display device is used as a display device in many electronic apparatuses. A method utilizing a longitudinal electric field system, and a method utilizing a transverse electric field system are known as a method of applying an electric field across a liquid crystal layer of the liquid crystal display device. The liquid crystal display device utilizing the longitudinal electric field system is such that electrodes are respectively provided on paired transparent substrates disposed so as to sandwich the liquid crystal layer between them, and an electric field oriented approximately in a column direction is applied to liquid crystal molecules through the pair of electrodes. A liquid crystal display device having a Twisted Nematic (TN) mode, a liquid crystal display device having a Vertical Alignment (VA) mode, a liquid crystal display device having a Multi-domain Vertical Alignment (MVA) mode, and the like are known as the liquid crystal display device utilizing the longitudinal electric field system.
On the other hand, the liquid crystal display device utilizing the transverse electric field is such that a pair of electrodes is provided in an insulated style only on an inner surface side of one of paired substrates disposed so as to sandwich a liquid crystal layer between them and an electric field oriented approximately in the transverse direction is applied to the liquid crystal molecules. A liquid crystal display device having an In-Plane Switching (IPS) mode in which paired electrodes do not overlap each other in terms of planar view, and a liquid crystal display device having a Fringe Field Switching (FFS) mode in which paired electrodes overlap each other in terms of planar view are known as the liquid crystal display device utilizing the transverse electric field system.
In any of those liquid crystal display devices, pixel electrodes and a common electrode for formation of an electric field for changing an orientation of liquid crystal molecules, and scanning lines and signal lines for changing a voltage of the pixel electrode every pixel are formed in a display area of an array substrate. In this case, the pixels are disposed in a matrix. Predetermined signals are applied from driving ICs to the scanning lines and the signal lines, thereby displaying a predetermined image.
On the other hand, although the portable liquid crystal display device is used in a combination of a battery as a drive power source, the battery is come off in some sort of trigger (hereinafter referred to as “battery coming-off”) in some cases. At this time, when the liquid crystal display device is in a driven state and thus the electric field is applied to the liquid crystal, a driving IC becomes a power source cut-off state in an instant. Therefore, the electric charges remain between the pixel electrodes and the common electrode, and thus the electric field is held applied to the liquid crystal. As a result, a burn-in phenomenon is caused. The normal liquid crystal display device is configured in such a way that a potential of the common electrode becomes the ground level as soon as the driving IC becomes the power source cut-off state. As will be described later, however, the normal liquid crystal display device is configured in such a way that the electric charges in the pixel electrode are hardly discharged. As a result, a potential difference is generated between the common electrode and the pixel electrode, and thus the electric field is held applied to the liquid crystal. In addition, when the power source is normally connected again after the electric field has been held applied to the liquid crystal in such a manner, a display failure such as a flicker is caused. Such a phenomenon remarkably appears especially in the case of the liquid crystal display device utilizing the transverse electric field system and having the FFS mode or the like.
In the portable liquid crystal display device, the discharge of the electric charges when the battery coming-off has been caused depends on OFF-leakage characteristics (IDS characteristics) of a Thin Film Transistor (TFT) for driving the pixel electrode when none of the measures is taken to cope with the battery coming-off. However, in the case of a Low Temperature Polycrystalline Silicon (LTPS)-TFT, the electric charges charged in the pixel electrode are not substantially caused because the leakage current is almost zero.
For example, an example of electrical characteristics of a general N-channel LTPS-TFT is shown in FIG. 9. It is noted that FIG. 9 shows a gate-to-source voltage Vg and a value of a current Ids caused to flow between a drain electrode and a source electrode when a drain voltage Vd=+10 V, and the drain voltage Vd=+0.1 V. The LTPS-TFT has a cut-off area in which no current is substantially caused to flow when the gate-to-source voltage Vg is equal to or smaller than a threshold voltage Vth, a rise area in which when the gate-to-source voltage Vg is equal to or larger than the threshold voltage Vth, Ids abruptly increases with an increase in gate-to-source voltage Vg, and a saturated area in which even the gate-to-source voltage Vg increases, the value of the current Ids becomes approximately constant.
As can be seen from the graph of FIG. 9, in the case of the gate-to-source voltage is 0 V in the general N-channel LTPS-TFT, even when the potential at the source electrode is 0 V, in any of the case of the drain voltage Vd=+10 V and the case of the drain voltage Vd=+0.1 V, the value of the current Ids is equal to or smaller than 10−12 A, and thus a very small leakage current is merely caused to flow. For this reason, in particular, in the liquid crystal display device having the Fringe Field Switching (FFS) mode and using the LTPS-TFT as the TFT for driving the pixel electrode, since the burn-in phenomenon becomes easy to cause, some sort of measures needs to be taken in the phase of the abrupt power source cut-off state or the like.
With regard to the measures taken to cope with those problems, it is expected that the battery coming-off is detected, and thus a display-OFF sequence is driven and so forth. However, since the battery coming-off is caused in an instant, it is difficult to sufficiently actuate the display-OFF sequence. Then, in the liquid crystal display device disclosed in Japanese Patent No. 3884229 (hereinafter referred to as Patent Document 1), attention is paid to the fact that the IDS characteristics of the TFT for driving the pixel electrode depends on the VGS potential. That is to say, the VGS potential in the phase of the battery coming-off is increased, thereby speedily discharging the electric charges in the pixel electrode. Here, a circuit for increasing the potential VGS of the liquid crystal display device disclosed in Patent Document 1 will now be described with reference to FIGS. 10 and 11.
Note that, FIG. 10 is a circuit diagram of a gate-OFF voltage control circuit of the liquid crystal display device disclosed in Patent Document 1. FIG. 11 is a graphical representation showing changes in voltages in the gate-OFF voltage control circuit. The gate-OFF voltage control circuit switches a voltage VL applied to a scanning line from a normal potential over to a potential for leakage by using three potentials of a potential (20 V) at a terminal VH corresponding to a gate-ON voltage in the normal state, a potential (7 V) at a terminal VCOM, and a potential (−12 V) at a terminal VEE when the power supply from a power source of the liquid crystal display device is stopped, so that an absolute value of a power source voltage begins to stop.
In the normal operation, at and before a voltage supply cut-off time T1, a potential at a terminal VL is supplied as a potential which is a given voltage larger than VEE by a diode TD1 provided between the terminal VEE and the terminal VL. In FIG. 10, since a 9 V-product is used as the diode TD1, a voltage which is 9 V larger than the potential at the terminal VEE is supplied to the terminal VL. During this state, a transistor element TR1 interposed between the terminal VCOM and the terminal VEE is held in an OFF state.
Next, when the power supply is cut off at T1, as also shown in FIG. 11, the potential at the terminal VH begins to drop toward the GND potential. At this time, since a potential at a connection point P1 side of a capacitor C1 is also reduced so as to follow the drop of the potential at the terminal VH, a potential at the connection point P1 becomes the threshold voltage or more lower than that at a connection point P2. As a result, the transistor element TR1 becomes a conduction state, so that the connection point P2 and the connection point P3 are short-circuited. As a result, the voltage developed at the terminal VEE (at a connection point P3) and the voltage developed at the terminal VCOM (at the connection point P2) are cancelled each other to rapidly make toward the GND potential. This simultaneously means that a value of a voltage at a connection point P5 (=the potential at the connection point P3) rapidly increases from a minus potential toward the GND potential. For this reason, a potential at the terminal VL (at a connection point P4) (=a potential at a connection point P6) rapidly rises as shown in FIG. 11 due to the presence of the diode TD1.
Finally, when the potential at the connection point P5 reaches the GND potential at a time T2 as a time point at which the voltage VL is maximum, the potential at the connection point P4 also gets a maximum value. At and after the time point T2, the potential at the connection point P4, that is, the potential VL gradually drops toward the GND potential. At this time, a capacitor C2 is connected between the connection point P5 and the connection point P6. The reason for this is because a period of time from the time point T2 at which the potential VL reaches the maximum value to a time point at which the potential VL drops to the GND potential can be lengthened.
As shown in FIG. 11, the potential at the terminal VL shows inverse V letter-like characteristics in which at and after the time point T1, the potential at the terminal VL temporarily rises up to a potential between the potential at the terminal VL and the potential at the terminal VH in the phase of the operation, and soon reaches the GND potential. Therefore, it is possible to realize a configuration with which when the power supply from the power source is cut off, the potential at the terminal VL is supplied to the corresponding one(s) of the scanning lines, thereby leaking the electric charges in the pixel electrode.